TSMC announced at the 2026 North American Technology Forum on the 22nd local time that the CoWoS 2.5D heterogeneous integration technology with 14 times mask size is expected to begin production in 2028, and a larger version will be launched in 2029.
TSMC is currently producing CoWoS with a mask size of 5.5 times, while CoWoS with a mask size of 14 times can integrate approximately 10 large computing dies and 20 HBM memory stacks. TSMC also plans to launch advanced packaging of SoW-X system level wafers with a 40x mask size in 2029.
In terms of SoIC 3D chip stacking, TSMC stated that the A14-to-A14 SoIC is expected to be produced in 2029, with a D2D I/O density 1.8 times that of N2-to-N2 SoIC, supporting higher data transmission bandwidth. The true CPO solution using COUPE on the substrate is expected to start production in 2026, providing twice the energy efficiency and reducing latency by 90% compared to PCB level pluggable solutions.
In addition, according to Reuters, Zhang Xiaoqiang, Deputy General Manager and Deputy Co Chief Operating Officer of TSMC Shenzhen, announced at an event yesterday that TSMC Arizona, the US branch of TSMC, has started the construction of its first advanced packaging facility. He also said:
We are actively expanding our capabilities within the Arizona factory. We plan to establish CoWoS and 3D-IC capabilities locally before 2029, which remains our goal.
